Non-volatile memory devices are able to retain stored data even when the power supply is interrupted. Non-volatile memory devices comprise flash devices which can be programmed using electrical signals. For the memory device to be byte-operational, a 2T cell structure consisting of a memory transistor and a select or access transistor in series can be provided. The memory transistor stores data programmed into the memory cell, while the access transistor selects the memory cell to be programmed or erased.
The memory transistor can be of various types including, for example, floating gate type, metal-nitride-oxide-silicon (MNOS) type, silicon-nitride-oxide-silicon (SNOS) type, metal-oxide-nitride-oxide-silicon (MONOS) type, and silicon-oxide-nitride-oxide-silicon (SONOS) type. The SONOS type memory transistor has a stacked gate structure comprising a nitride layer sandwiched between lower and upper oxide layers, and a polysilicon gate layer. The lower oxide layer is a tunnel oxide layer, the nitride layer is a memory or storage layer, and the upper oxide layer is a blocking layer for preventing the loss of stored charge. The charge-trapping ability of the SONOS stack structure allows lower programming and erase voltages to be used. The SONOS memory transistor also comprises source and drain regions formed on either side of the stack structure.
Programming is typically by hot carrier injection. Programming speed depends on the efficiency of hot carrier generation which, in turn, depends on the programming current. Programming current is affected by various factors including, for example, channel doping level and gate width of the memory transistor. Erase can be by Fowler-Nordheim (F-N) tunneling.
Generally, it is desirable to provide a non-volatile memory device having high programming speed and small cell size to allow for high density memories.